Hook: The Collective Short Memory
The market is now collectively short on memory stocks. This is a data point, not a prophecy. The sentiment shift, as cited in a recent investment note, posits a rotation from DRAM/NAND giants to the promise of Co-Packaged Optics (CPO). The narrative is seductive: storage solved the AI compute wall, but the next bottleneck is optical interconnect bandwidth. Assumption is the adversary of verification. Let's dissect the technical and structural realities behind this binary trade.
Context: Two Sectors, One Infrastructure
Memory refers to the DRAM, NAND, and HBM (High Bandwidth Memory) supply chain, dominated by Samsung, SK Hynix, and Micron. These are mature, cyclical, capital-intensive IDM businesses. CPO is the emerging technology of integrating an optical engine (a photonic integrated circuit or PIC) onto the same substrate as a switch ASIC using advanced packaging like CoWoS. This eliminates the power-hungry electrical transceivers of standard pluggable modules. The technical link is AI infrastructure: HBM feeds data to GPUs, and CPO moves data between them. The market is treating them as a zero-sum game. My audit experience suggests this is a dangerous oversimplification.
Core: The Systematic Teardown of the Rotation Thesis
1. Technical Maturity and the Yield Gap
Memory is a process engineering marvel. DRAM is at 1β nm, HBM3E uses 8-12 layer TSV (Through-Silicon Via) stacking. NAND is above 200 layers. Yields are 95%+ for mainstream products. HBM yields have improved massively, though TSV stacking still has a 5-10% variance. The technology is de-risked; the risk is cycle timing.
CPO is a packaging and reliability nightmare. The core is coupling a laser source (InP) to a silicon photonic chip (SiPh) on a 2.5D interposer with a 5nm or 3nm switch ASIC. The coupling loss between the fiber array and the PIC must be <1dB. The thermal mismatch between the active laser and the silicon die is a physics problem. Current overall yields for CPO modules are below 50% in many pilot lines. Scaling this to volume production, as industry roadmaps target for 2028, requires a 3x improvement in coupling yield and a 10x reduction in cost. The gap between pilot and production is often underestimated by three years.
2. Supply Chain: The Illusion of Independence
Proponents argue CPO is a "safer" bet because it avoids the export controls hitting memory. This is a fallacy.
Memory dependency: Chinese memory manufacturers (CXMT, YMTC) are approximately 1-2 generations behind (2-3 years) in advanced DRAM/NAND. They are restricted from buying EUV and high-end DUV lithography from ASML. This is a real bottleneck.
CPO dependency: The switch ASIC (Broadcom Tomahawk 5, Marvell Teralynx 10) is the most valuable component. It is designed by US firms using ARM/x86 cores. The laser source (InP) requires MOCVD reactors from AIXTRON (Germany) or Veeco (US). The high-precision die bonders for coupling are from ASM Pacific (Netherlands) or Shibaura (Japan). If the US government deems CPO critical to AI infrastructure, it will be added to the Entity List. The supply chain is not more secure; it is just earlier in the regulatory cycle. The assumption that it is "safe" from geopolitics is the adversary of verification.
3. The Capital Expenditure Trap
Memory companies are currently spending 30-40% of revenue on CapEx, building new fabs. The 2024-2025 cycle was highly profitable, leading to massive capacity expansion for DRAM and HBM. This creates a classic supply glut risk in 2026-2027. The market is correctly pricing this.
CPO companies, however, are mostly fabless or light-asset. The heavy CapEx is on the foundry side (TSMC CoWoS) and the OSAT (ASE, Amkor). The capital efficiency of CPO is therefore dependent on the capacity allocation of TSMC, which is currently dominated by NVIDIA and AMD GPU orders. CPO is competing for the same CoWoS capacity. If AI CapEx stalls, the CPO capex allocation will be cut first. A rotation into CPO is not a rotation away from capital intensity; it is a rotation into a different form of capital dependency.
Contrarian Angle: What the Bulls Got Right
Despite the noise, the bulls correctly identified two structural shifts. First, the interconnect bottleneck is real. At 800G and 1.6T port speeds, the power density of pluggable optics (QSFP-DD, OSFP) is becoming unsustainable. CPO can reduce power per bit by 30-50%. This is a fundamental physics advantage. Second, the memory cycle is peaking. The days of 100%+ earnings growth are behind us. The bull case for CPO is a long-term bet on a technology that will become dominant in 2028-2030, not a short-term trade.
My counter-argument is that the market is conflating a trend with a timeline. The current market cap of CPO-related stocks already prices in a 5-10% market share in 2028. This is aggressive. The memory bear case is cyclical, but the companies have strong balance sheets and are rationalizing production. The CPO bull case is structural, but the technology is pre-revenue for most players. The trade is a bet on narrative momentum, not fundamental value. I have seen three similar rotations in my career (2017 ICOs, 2020 DeFi, 2021 NFT minting), and all of them ended with the crowd being wrong about the timeline.
Takeaway: The Accountability Call
The market is not wrong to be skeptical of memory. The cycle is turning. But the market is wrong to assume CPO is a risk-free haven. The technology is immature, the supply chain is geopolitically exposed, and the CapEx dependency is simply shifted to a different point in the stack. The rotation is a symptom of a market looking for a narrative replacement. It is not a reflection of a fundamental shift in value creation. The ledger remembers everything. The real question is not whether CPO will win, but whether the current valuations survive the next two years of yield engineering. Based on my audit experience, the answer is no. The due diligence is not optional.